1. Field of the Invention
The present invention relates to the structure of a field effect transistor (FET) which can realize ultra high-speed operation, and a method of manufacturing the same.
2. Related Background Art
Conventionally, an FET which can realize an ultra high-speed operation, in which an active layer for forming a current channel adopting a so-called pulse-doped structure is known. In the FET with the pulse-doped structure, the impurity profile of the active layer reveals an undoped state from the substrate surface to a predetermined depth. However, the impurity concentration changes in a pulse-like pattern or stepwise to a high concentration at the predetermined depth from the substrate surface, and the impurity profile returns to an undoped state at a deeper substrate position. Such an FET with the pulse-doped structure is described in, e.g., U.S. Pat. No. 4,163,984 or in p. 759 of the following reference:
1986 IEEE IEDM "A 760 mS/mm N.sup.+ SELF-ALIGNED ENHANCEMENT MODE DOPED-CHANNEL MIS-LIKE FET(DMT)"
However, in such an FET with the pulse-doped structure, a sufficient quantity of electrons for forming a current channel cannot be assured. For this reason, another patent application (Japanese Patent Laid-Open No. 4-245646) by the present applicant proposed an FET having a pulse-doped structure in which two active layers are formed. With this FET, since the two active layers are formed, the quantity of electrons for forming a current channel increases, and a high current output can be realized.
However, in the conventional FET with the structure including two active layers, when a long gate effect occurs due to a surface depletion layer in the drain electrode side, the effective gate length increases, and the active layer formed on the surface side of the substrate is depleted. When the active layer is depleted, the flow of channel electrons is hindered, and the total quantity of electrons for forming a current channel decreases. As a result, a high current output cannot often be obtained in the conventional FET with the above-mentioned structure.
In the conventional FET with the pulse-doped structure described in the above-mentioned U.S. Patent, electrons for forming a channel move in an active layer with a high impurity concentration in a low electric field region. For this reason, electrons are considerably influenced by impurity scattering, and the electron mobility in a low electric field region is lowered. As a result, the high-frequency operation characteristics of an element cannot be improved. A transconductance g.sub.m which represents the rate of change in drain current with respect to a change in gate voltage cannot hold a constant value over a given range with respect to a change in gate voltage.